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@jukan05: Samsung Embarks on Development of 'Extreme High Aspect Ratio Copper Pillar' Packaging for Mobile DRAM HBM Samsung Electronics is developing...

@jukan05 3 信息等级 3 1 噪音/剔除;2 较弱;3 普通事实;4 重要行业动态;5 极重大事件。该分数是信息显著性,不是投资建议。 发布:2026-05-17T09:17 抓取:2026-05-17 16:02
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摘要

三星电子正在开发用于移动设备HBM的下一代封装技术“Multi Stacked FOWLP”,通过将铜柱高宽比从3-5:1提升至15-20:1并与FOWLP结合,旨在实现移动设备中的高容量、高带宽HBM,解决传统LPDDR封装的I/O限制和信号损失问题。

客观事实
  • 三星开发Multi Stacked FOWLP技术用于移动HBM
  • 铜柱高宽比从3-5:1提升至15-20:1
  • 结合FOWLP降低铜柱弯曲风险
Samsung Electronics HBM FOWLP

原文

Samsung Embarks on Development of 'Extreme High Aspect Ratio Copper Pillar' Packaging for Mobile DRAM HBM

Samsung Electronics is developing next-generation HBM packaging technology to enable high-performance on-device AI in mobile devices. The approach evolves the existing VCS (Vertical Cu-post Stack) technology by combining extreme high aspect ratio copper pillars with FOWLP (Fan-Out Wafer Level Packaging).

According to industry sources on the 12th, Samsung Electronics is developing "Multi Stacked FOWLP" technology. The goal is to realize high-capacity, high-bandwidth HBM in mobile devices such as smartphones and tablets. While server HBM already delivers high bandwidth, mobile applications face far stricter constraints on size, thickness, power, and thermal performance.

Traditional mobile memory (LPDDR) packaging uses copper wire bonding. This technology is limited in the number of I/O terminals (128–256), suffers from significant signal loss, and exhibits poor thermal and power efficiency. To address these limitations, Samsung Electronics previously introduced VCS technology, which stacks DRAM dies in a staircase configuration and fills the gaps with copper pillars. This new technology takes that approach a step further by leveraging extreme high aspect ratio copper pillars.

Samsung Electronics has dramatically increased the aspect ratio of the copper pillars used in VCS packaging from the existing 3–5:1 to 15:1–20:1, thereby further widening bandwidth. However, when copper pillar diameter shrinks below 10 micrometers, the risk of bending or breaking increases significantly. To mitigate this, Samsung has adopted a strategy of combining the structure with FOWLP processing. FOWLP is a technology that molds the chip and then extends the wiring outward, serving as a structural support for the copper pillars.

This approach allows more I/O terminals to be arranged in the same area, enabling an expected 15–30% bandwidth improvement, with memory stacking counts also achievable at 1.5× or more. As the technology is still in the development stage, it is difficult to pinpoint a mass production or commercialization timeline, but some projections suggest it could be deployed as early as the later version of Exynos 2800 or starting from Exynos 2900.

This technology roadmap is being viewed as evidence that Samsung Electronics has positioned its memory business around high-value-added technology centered on performance and reliability, rather than low cost and high efficiency. The industry views technological leadership in mobile HBM as a critical variable that will determine future premium AI smartphone market share and the differentiation success of Galaxy AI.

That said, since HBM demand in servers, data centers, and AI accelerators is expected to remain robust for the time being, some opinions suggest that mobile HBM development and mass production could be delayed relative to the planned roadmap.

An industry official explained, "With HBM demand for servers and data centers still explosive, it is difficult for Samsung to concentrate all of its resources on mobile HBM development. How they balance technological maturity with the timing of mass production will be the key issue."

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