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@jukan05: SK Hynix Pursues 2.5D Packaging Collaboration with Intel, Signaling Shifts in AI Chip Supply Chain SK Hynix is drawing attention as it purs...

@jukan05 3 信息等级 3 1 噪音/剔除;2 较弱;3 普通事实;4 重要行业动态;5 极重大事件。该分数是信息显著性,不是投资建议。 发布:2026-05-11T06:53 抓取:2026-05-11 16:02
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摘要

SK海力士正与英特尔合作研发2.5D封装技术,计划采用英特尔的EMIB技术集成HBM与逻辑芯片。目前处于早期测试阶段。由于台积电2.5D封装产能紧张,AI加速器封装供应链可能迎来多元化。

客观事实
  • SK海力士正与英特尔合作研发2.5D封装
  • SK海力士测试英特尔EMIB技术集成HBM与逻辑芯片
  • 台积电2.5D封装产能紧张或推动供应链多元化
SK海力士 英特尔 英伟达 AMD 台积电 HBM EMIB 2.5D封装

原文

SK Hynix Pursues 2.5D Packaging Collaboration with Intel, Signaling Shifts in AI Chip Supply Chain

SK Hynix is drawing attention as it pursues collaboration with Intel in advanced packaging. The company is currently understood to be conducting tests that adopt Intel's 2.5D packaging technology to integrate High Bandwidth Memory (HBM) with logic chips.

With Taiwan's TSMC—the leader in 2.5D packaging—recently grappling with a severe supply crunch, expectations are growing that the 2.5D packaging supply chain for AI accelerators could diversify.

According to industry sources on the 11th, SK Hynix is conducting joint R&D with Intel on 2.5D packaging technology.

2.5D packaging is a technique that inserts a thin film-like interposer between the chip and substrate to enhance chip performance. Representative applications include the AI accelerators being developed by global big tech firms such as NVIDIA and AMD. AI accelerators are built by combining high-performance logic chips—such as GPUs—with HBM through 2.5D packaging.

At present, the global 2.5D packaging supply chain for big tech is effectively monopolized by TSMC, Taiwan's leading foundry. SK Hynix has also maintained a close partnership with TSMC, conducting joint R&D on HBM and 2.5D packaging.

Beyond this, SK Hynix is reviewing the adoption of Intel's 2.5D packaging technology, "Embedded Multi-die Interconnect Bridge" (EMIB). The company is understood to be testing the integration of HBM and logic chips using EMIB-embedded substrates supplied by Intel.

A source familiar with the matter said, "While it is still at an early R&D stage, SK Hynix is actively conducting tests to implement 2.5D packaging using Intel's EMIB," adding that "the company is also scouting candidate materials and components that would be required for actual volume production."

The discussions between SK Hynix and Intel are seen as well aligned in terms of mutual interests.

TSMC's 2.5D packaging technology, "Chip-on-Wafer-on-Substrate" (CoWoS), has been suffering from acute supply shortages amid the recent AI semiconductor boom. As a result, several big tech firms have turned their attention to Intel's EMIB as a promising alternative to CoWoS.

From SK Hynix's perspective, preemptive R&D on Intel's EMIB is also necessary. While SK Hynix does not manufacture 2.5D packaging itself, developing HBM with the structure and characteristics of 2.5D packaging in mind is advantageous for improving yield and reliability. In fact, SK Hynix operates a small-scale line domestically dedicated to 2.5D packaging R&D.

Furthermore, the collaboration is expected to allow Intel to significantly expand its advanced packaging business. Intel's EMIB uses small silicon bridges to connect chips, rather than a broad interposer. Because bridges only need to be placed where chip-to-chip connections are required, chips can be arranged more flexibly and efficiently.

An industry source explained, "Intel is currently promoting its EMIB technology aggressively to SK Hynix and major OSATs," and "over the medium to long term, Intel's EMIB is expected to be added to the 2.5D packaging supply chain for AI accelerators."

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